Digital codes in digital circuits may need scaling by multiplying a scale factor to the digital codes. For example, digital outputs of an analog-to-digital converter (ADC) often do not fill out the full range of the ADC. Thus, during the testing process, a scale factor may be determined so that digital outputs from the ADC may be scaled to the full range of the ADC. For example, a 12-bit ADC has a full range of 0 to 4095. However, if the digital outputs are limited to a range of 0 to 4000, the digital outputs may need to be scaled by a factor of 4096/4000≈1.024. The scaling may be achieved by using a digital multiplier (or scaler). FIG. 1A illustrates a system diagram for digital gain error correction. The system includes an ADC 2 and a digital scaler 4. The N-bit ADC 2 converts analog input signals to digital codes Dn which falls into a first range of (0, L) that is less than the full range of the ADC of (0, 2N−1). The digital scaler 4 may multiply the digital codes Dn with a scale factor K to generate D′n=K*Dn so that D′n may utilize the full range of the ADC.
One issue associated with the digital scaling as shown in FIG. 1A is the missing code problem which is best illustrated by the following example. Assume that Dn is the digital codes before gain correction, and D′n is the digital codes after gain correction. Dn may be outputs from an ADC or obtained by other means that is known to a person skilled in the art. Further, assuming that a full range of Dn is 0 to 2047, and the scale factor for Dn is K=(1+(63/2048)), D′n=K*Dn=Dn+(63/2048)*Dn, where the operation (63/2048)*Dn is implemented as a digital multiplication. Table 1 illustrates a portion of the results to scale Dn to D′n. As illustrated in Table 1, the digital codes D′n after scaling miss the code “33.”
TABLE 1Dn 303132 33D′n30313234
While Table 1 shows an example of one missing code, missing codes may periodically occur throughout the full range. Further, since the scaling ratio between Dn and D′n is fixed, the missing codes for the scaling factor may persistently occur at the same data points and cause patterned noise. The missing codes in the context of analog-to-digital conversions may be measured in terms of differential nonlinearity (DNL) that is defined as the deviation between analog values corresponding to adjacent input digital values. Thus, if there is no missing code after digital scaling, the deviations between analog values corresponding to adjacent input digital values are small, and DNL is correspondingly minimum. However, if there are missing codes after digital scaling, the deviations between analog values corresponding to adjacent input digital values become large, and DNL correspondingly increases.
To solve the missing code problem, current art adds extra bits to increase the resolution for Dn. For example, if Dn are codes of N bit long, generated from the output of an ADC, to overcome the missing code problem, an ADC of N+1 bit resolution may be used for analog to digital conversion. FIG. 1B illustrates a system diagram for digital gain error correction using an N+1 bit ADC. Using one extra bit of ADC may limit DNL approximately to ±0.5 least significant bit (LSB). However, adding one extra bit to ADC resolution increases the complexity of the ADC circuitry (larger area and more complicated circuit) and requires more testing.
Besides occurring during scaling (or multiplication), the missing codes may also happen during other types of operations such as division, averaging, and filtering (convolution) in digital signal processing. ADCs may include circuit implementations of these operations in various manners.